Rockchip Ethernet PHY Debugging: RGMII Delays, MDIO and Link Problems

Rockchip GMACs use the Linux stmmac driver with the dwmac-rk glue, connected over RGMII (gigabit) or RMII (10/100) to an external PHY such as a Realtek RTL8211F, Motorcomm YT8521 or Microchip KSZ9031. Symptoms map to causes quite reliably:

Step 1: Driver and PHY detection

dmesg | grep -iE "stmmac|dwmac|rk_gmac|phy"
ip -d link show eth0
cat /sys/bus/mdio_bus/devices/*/phy_id 2>/dev/null

You should see the PHY ID read over MDIO (e.g. 0x001cc916 for RTL8211F). If not, check:

• PHY reset GPIO and its timing (snps,reset-gpio / snps,reset-delays-us on vendor kernels, or reset-gpios on the PHY node in mainline).
• PHY supply and its crystal (25 MHz).
• MDIO/MDC pinctrl and the PHY address strap (reg = <0x1> must match the strap).

Step 2: RGMII delays (the #1 issue)

RGMII needs about 2 ns of clock-to-data skew in each direction. It can come from the PHY (internal delay), the MAC (Rockchip delay lines) or the PCB traces, but it must be added exactly once per direction.

/* Option A: MAC adds the delays (common in vendor DTS) */
&gmac0 {
    phy-mode = "rgmii";
    tx_delay = <0x43>;
    rx_delay = <0x33>;
    ...
};

/* Option B: PHY adds both delays */
&gmac0 {
    phy-mode = "rgmii-id";
    tx_delay = <0x0>;
    rx_delay = <0x0>;
};

/* Option C: PHY adds RX delay, MAC adds TX delay */
&gmac0 {
    phy-mode = "rgmii-rxid";
    tx_delay = <0x43>;
};

Delay values are board-specific. Vendor BSP kernels include an RGMII loopback delay-scan helper exposed through the GMAC's sysfs node, described in Rockchip's GMAC developer guide. Use it to find the centre of the working window on your PCB instead of copying another board's numbers.

Step 3: Clocks

• clock_in_out = "output": the SoC generates the 125 MHz (RGMII) / 50 MHz (RMII) reference.
• clock_in_out = "input": the PHY supplies it. The PHY must be configured to output it (often a strap or register setting).
• For RMII, confirm who drives the 50 MHz REF_CLK and that only one side does.

Step 4: Test the link

ethtool eth0                   # speed, duplex, link detected
ethtool -S eth0 | grep -iE "err|crc|drop"
ethtool -s eth0 speed 100 duplex full autoneg off   # isolate gigabit timing issues
iperf3 -c <server> -t 30 && iperf3 -c <server> -R -t 30

Run iperf3 in both directions: a TX-only or RX-only failure points straight at the corresponding delay.

Step 5: 2.5 GbE boards

Ports driven by a PCIe NIC (e.g. RTL8125) aren't GMAC at all. Debug them as PCIe devices (lspci, r8169 / r8125 driver). See the PCIe checklist.